Electronic devices such as computers, laptops, personal video recorders (PVRs), MP3 players, game consoles, set-top boxes, digital cameras, and other electronic devices often need to store a large amount of data. Storage devices such as hard disk drives (HDD) may be used to meet these storage requirements. Some of these devices may be portable devices that rely on battery power. For these devices, low power consumption of the HDD is important. Furthermore, low noise is also an important design issue. As the inductance of the HDD increases, current ripple also tends to increase. Current ripple increases noise and dissipates power.
Referring now to FIG. 1, a HDD system 10 is shown to include a HDD PCB 14. A buffer 18 stores read, write and/or volatile control data that is associated with the control of the HDD system 10. The buffer 18 usually employs volatile memory having low latency. For example, SDRAM or other types of low latency memory may be used. Nonvolatile memory 19 such as flash memory may also be provided to store critical data such as nonvolatile control code.
A processor 22 arranged on the HDD PCB 14 performs data and/or control processing that is related to the operation of the HDD system 10. A hard disk control module (HDC) 26 communicates with an input/output interface 24 and with a spindle/voice coil motor (VCM) module 30 and/or a read/write channel module 34. The HDC 26 coordinates control of the spindle/VCM driver 30, the read/write channel module 34 and the processor 22 and data input/output with a host 35 via the interface 24.
During write operations, the read/write channel module 34 encodes the data to be written onto a read/write device 59. The read/write channel module 34 processes the write signal for reliability and may apply, for example, error correction coding (ECC), run length limited coding (RLL), and the like. During read operations, the read/write channel module 34 converts an analog read signal output of the read/write device 59 to a digital read signal. The converted signal is then detected and decoded by known techniques to recover the data that was written on the HDD.
A hard disk drive assembly (HDDA) 50 includes one or more hard drive platters 52 that include magnetic coatings that store magnetic fields. The platters 52 are rotated by a spindle motor that is schematically shown at 54. Generally the spindle motor 54 rotates the hard drive platter 52 at a controlled speed during the read/write operations. One or more read/write arms 58 move relative to the platters 52 to read and/or write data to/from the hard drive platters 52. The spindle/VCM driver 30 controls the spindle motor 54, which rotates the platter 52. The spindle/VCM driver 30 also generates control signals that position the read/write arm 58, for example using a voice coil actuator, a stepper motor or any other suitable actuator.
The read/write device 59 is located near a distal end of the read/write arm 58. The read/write device 59 includes a write element such as an inductor that generates a magnetic field. The read/write device 59 also includes a read element (such as a magneto-resistive (MR) element) that senses the magnetic field on the platter 52. The HDDA 50 includes a preamp circuit 60 that amplifies the analog read/write signals. When reading data, the preamp circuit 60 amplifies low level signals from the read element and outputs the amplified signal to the read/write channel module 34. While writing data, a write current is generated that flows through the write element of the read/write device 59. The write current is switched to produce a magnetic field having a positive or negative polarity. The positive or negative polarity is stored by the hard drive platter 52 and is used to represent data.
Referring now to FIG. 2, the spindle/VCM driver 30 receives a system clock signal 70 from a system clock 72, which may be generated by another device such as a PCB system on chip (SOC). The spindle/VCM driver 30 includes a spindle driver 74 and a VCM driver 76. The spindle driver 74 outputs drive signals to a spindle motor 78. The VCM driver 76 outputs drive signals to the VCM 80. Both the spindle driver 74 and the VCM driver 76 receive the system clock signal 70.
The spindle driver 74 generates pulse width modulation (PWM) signals that rotate the spindle motor 78. The PWM signals are based on the system clock signal 70. The system clock signal 70 is also provided to additional spindle/VCM components such as the VCM driver 76 and a switch capacitor regulator 84.
Referring now to FIGS. 3 and 4, the spindle driver 74 includes a serial bit multiplier 90, a PWM generator 92 and a count adder or ramp generator 94. The count adder 94 uses the system clock signal to generate a ramp signal. The serial bit multiplier 90 generates a reference value. The PWM generator 92 includes phase modules A, B and C, which are labeled 92-A, 92-B and 92-C in FIG. 3. Each phase module compares the reference value to the output of the count adder 94. As shown in FIG. 4, when the reference value 95 exceeds the ramp counter signal 96, the PWM signal 97 goes high (or low). When the ramp counter 96 exceeds the reference value 95, the PWM signal 97 goes low (or high). Phase signals 93-A, 93-B and 93C are output by the PWM generator 92 to the spindle motor 78. Referring now to FIGS. 5A and 5B, current 122, voltage 124 and back EMF 126 are shown. As can be seen at 128, the current 122 has undesirably high current ripple.